Achieving high throughput with register-based dense matrix relay modules - VXIbus, VMEbus Extensions for Instrumentation - Technical
Sam S. TsaiWith an onboard FIFO buffer and register-based programming, HP's VXIbus dense matrix relay modules provide high throughput and a downsized, low-cost solution to matrix switching.
Matrix switching, through which several instruments can be connected to multiple devices under test (DUTs) selectively, is a popular switching technique used in electronic test. In traditional rack-and-stack systems, matrix switching requires large amounts of rack space and is costly because of the amount of hardware required. The HP E1465A, HP E1466A, and HP E1467A dense matrix relay modules described in this article provide a downsized, low-cost solution to matrix switching. These VXIbus matrix switching modules each occupy one C-size VXIbus mainframe slot, and with 256 relays per module are one of the highest-density switch modules available.
These devices are suited for VXIbus register-based systems and register-based programming. In addition to their design, this article covers relay module programming and provides benchmarks of throughput speeds achieved with ASCII message-based and register-based programs.
Dense Matrix Relay Modules
The dense matrix relay module shown in Fig. 1 is a two-wire, 256 true crosspoint matrix switch. Due crosspoint means that any row can be connected to any column simultaneously. In this design, four 4-by-16 submatrices have been implemented on the main printed circuit board with 256 latching relays. Terminal cards convert the submatrices into 4-by-64 (HP E1466A), 8-by-32 (HP E1467A), or 16-by-16 (HP E1465A) matrices. The terminal card also provides screw terminals to connecting the DUT.
Latching Relays
There are several advantages to using latching relays. First, with 256 relays on the dense matrix module, latching relays prevent excessive current from the power supply if the user closes too many relays accidentally. Second, energy is saved since power is not continually applied to keep a latching relay closed. Third, because power is not continually applied, the relay coil does not heat up. This is important because the two metal contacts inside the relay in effect form a thermocouple. Thus, temperature differences on the relay contacts cause a thermal EMF to be generated. Also, the life of the latching relay is usually longer than the nonlatching relay because of the power that must be continually applied to close a nonlatching relay.
The primary disadvantage of latching relays is that the relay state is unchanged at power-on, power-off, or reset. Therefore, the device's firmware must ensure that all relays are open following these conditions.
Matrix Topology
An example of the relay module's matrix arrangement is shown in Fig. 2. Represented is the matrix for the HP E1467A 8-by-32 dense matrix relay module. The 8-by-32 matrix is formed by connecting together the rows of submatrices A and C, the rows of submatrices B and D, the columns of submatrices A and B, and the columns of submatrices C and D.
On the 8-by-32 dense matrix relay module, the rows in submatrices A and C are rows 0 through 3, and the rows in submatrices B and D are rows 4 through 7. The columns in submatrices A and B are columns 0 through 15, and the columns in submatrices C and D are columns 16 through 31.
High-Throughput Design
In conventional VXIbus switch module designs, the module interrupts its commander's CPU each time a relay is opened or closed. The interrupts cause the CPU to take more time to service other instruments, which decreases system throughput. The dense matrix relay modules make efficient use of the CPU by incorporating first-in-first-out (FIFO) memory blocks. When a function and channel list are sent to the relay module, both are downloaded into the FIFO memory. The CPU is then free to do other tasks. Only after the last channel in the list is opened (or closed) is the CPU interrupted. To show the advantage of the FIFO buffer consider a reset of the switch module. Following the reset, each channel relay must be open. Because latching relays are used, firmware must write data to each channel to ensure that it is open. Without the FIFO memory, the CPU would be interrupted 256 times (once for each relay) during the reset sequence.
How the Dense Matrix Relay Module Functions Mg. 32 and the following sequence describe how the switch relay module operates: A command is sent to the relay module and stored in FIFO memory.
Once the data is in memory, the VMEbus timing PAL (programmable array logic) asserts the signal DTACK*. This signals the CPU on the relay module's commander that it is now free to service other instruments.
The VMEbus timing PAL signals the FIFO interface PAL to execute the command. During execution, the data bus FIFO Empty* flag signals the FIFO interface PAL to read the data bus and address bus FIFOs and generate 7-ms pulses to activate the relays. Only one 7-ms pulse is required per relay bank (16 relays).
The FIFO Interface PAL reads the data bus and address bus FIFOs until the Empty* flag signals the FIFO interface PAL that the FIFO memory is empty.
When the FIFO is empty, the FIFO Interface PAL signals the VMEbus timing PAL which asserts IRO.*. This interrupts the command module CPU after the last relay has been activated.
Because the relay module only asserts IRG* after the last relay is activated, the CPU is not continually interrupted, thus enhancing system throughput.
Programming the Dense Matrix Relay Modules
In a VXIbus system there are message-based and register-based devices. Message-based devices have an onboard microprocessor, which interprets ASCII command strings and returns ASCII formatted results. Register-based devices, such as the dense matrix relay modules, do not have an onboard processor. Communication with these devices is through access to the device registers. How the registers are accessed affects system throughput.
SCPI Programming
One way to program the dense matrix relay modules is with high-level SCPI (Standard Commands for Programmable Instruments) commands. SCPI is an ASCII-based instrument command language designed for electronic test and measurement instruments (see the article on page 15 for a discussion of SCPI commands). SCPI defines standard sets of commands that allow different devices doing the same functions to be programmed with the same commands.
Programming the relay modules with SCPI commands requires the HP E1405 command module. Instrument drivers in the command module convert the SCPI commands to register "peeks" and "pokes." The command module enables the relay modules to be programmed the same as message-based devices.
In a program using SCPI commands, a relay module command is sent over the HP-IB to the command module (Fig. 4). The command statement includes the relay module's HP-IB address, the command, and the data. The format of a typical statement is
OUTPUT 70908;"CLOS (@10000)", which is a command from an HP 9000 Series 200 or 300 computer (select code 7) to the relay module at HP-IB secondary address 8 via the HP E1405 command module at the HP-IB primary address 9. (For HP VXIbus systems, the HP-IB secondary address is defined as the logical address divided by 8.)
The command module's HP-IB driver stores the ASCII text CLOS (@10000) in the input buffer of the relay module, and signals the parser that the input has a command to be parsed (interpreted). The command (CLOS) is reduced to a call (with a parameter of 10000) to a routine that writes register data to the FIFO memory on the relay card.
The SCPI commands most often used with the relay modules are:
[ROUTe:]CLOSe (@channel_list) [ROUTe:]OPEN (@channel_list) [ROUTe:]SCAN (@channel_list)
Channel lists are specified in the format nrrcc:nrrcc where:
n = relay module number. The module number is
based on the module's logical address and the number
of modules being programmed. For example, if a
switchbox instrument contains three relay modules
(which must have consecutive logical addresses), the
module with the lowest logical address is module
number 1. The module with the next lowest logical
address is module number 2, and so on.
rr =the row to be connected to column cc.
cc =the column to be connected to row rr.
For example, on relay module 1, to scan row 0 column 4 through row 0 column 8 (relays 4 through 8 in Fig. 2), the channel would be specified as:
SCAN (@10004):(10008)
Note that the nrrcc:nrrcc format was implemented before the format currently used by the SCPI standard:
n(rr!cc:rr!cc).
SCPI Advantages and Disadvantages
The advantage of programming the relay modules with SCPI commands is that this instrument language is common to all HP matrix relay modules and easy to understand. Also, the user only needs to specify a module number, row, and column to connect a row to a column.
The disadvantage of SCPI programming is decreased throughput because of command parsing by the HP E1405 command module. However, as the benchmark programs will show, the speed of the HP E1405 command interpreter is such that significant throughput gains are only achieved by eliminating command parsing with direct register access over the VXIbus backplane.
Register-Based Programming
Register-Based programming accesses the device registers directly (Fig. 5). Register programming increases throughput since it eliminates SCPI command parsing by the command module.
Locating the Registers. Register addresses for register-based devices are located in the upper 25% of the VXIbus A16 address space in the embedded controller or the command module. Every VXIbus device (up to 256 per system) is allocated a 64-byte block of addresses. Depending on the number of registers a device has, the device may not use all the addresses. Fig. 6 shows how register addresses are mapped into the A16 address spaces of the HP E1480A V/360 embedded controller and the HP E1405 command module.
When programming a register-based device, a hexadecimal or decimal register address is specified. The register address is defined as:
Register Address = Base Address + Register Offset
The Base Address. The base address used to determine the register address depends on the location of the A16 address space. If an embedded controller such as the HP E1480A V/360 controller (Fig. 6a) is used, the base address is computed as:
C000h + (LADDR X 64)h
or
49,152 + (LADDR x 64)
where C000h (49,152) is the starting location of the register addresses in the embedded controller's A16 address space, LADDR is the logical address of the register-based device, and 64 is the number of address bytes per device. If an HP E1405 command module Fig. 6b) is used, the base address is computed as:
1FC000h + LADDR x 64)h
or
2,080,768 + (LADDR X 64)
where 1FC000h (2,080,768) is the starting location of the register addresses in the HP E1405 A16 address space, LADDR is the logical address of the register-based device, and 64 is the number of address bytes per device. The Register Offset. The register offset is the register's location in the block of 64 address bytes in the A16 address space. Table I lists the register offsets of the dense matrix relay modules.
When specifying the bank on which to close a relay to connect a row to a column, the offset is added to the base address to form the complete register address. For example, assuming the A16 address space is inside the HP 1480A V/360 embedded controller, the logical address of the relay module is 64, and the relay is on bank 0, the complete register addresses is:
Register Address = Module's Base Address+Register Offset = C000h + (64 x 64)h + 20h = D020h
Register Offsets 06h, 08h, OAh, OCh, OEh, 010h, 12h, 14h,
16h, 18h, 1Ah, 1Ch, 1Eh Register Data. The base address and register offset specify a register's location in A16. Programming the relay modules at the register level also requires that the data that opens or closes the relay be sent. There are 16 relays on each bank on the dense matrix relay modules (see Fig. 2). These relays have corresponding bit values of 20 through 215. For example, to specify relay 05, 32 (2.sup.5) or 20h would be the data value sent. Similarly, to specify all 16 relays on a bank, -1 (65,535) or FFFFH would be sent.
Register-Based Commands. The commands used to program the relay module depend on the controller used. The commands used in the benchmark programs given later in this article include:
WRITEIO <select code>,<register_number>,<register data>
and
DIAGnostic:POKE <address>,<width>,<data>. WRITEIO is used with the HP V/360 controller and HP E1405 [BASIC (Instrument BASIC). For example, executing:
WRITEIO -16, Register_number1
on the V/360 writes one word of data on the VXIbus backplane (select code -16) to close the relay whose address (and bank offset) are specified by the variable Register-number. Executing the command from IBASIC closes the relay whose address is specified by the variable Register-address:
WRITEIO 9826,Register_address,1
DIAG:POKE is an SCPI command that allows users to program the relay module registers without using an embedded controller. This command is executed by the HP E1405 command module. For example, the statement
OUTPUT 70900;"DIAG:POKE H1FD020,16,1" closes relay 0 on bank 0 of the relay module. The command module parses the command header DIAG:POKE. However, the register address and data are written directly to the relay module's FIFO memory.
Advantages and Disadvantages. The primary advantage of register-based programming is increased throughput, which is achieved by eliminating SCPI command parsing and accessing registers from the VXIbus backplane. The disadvantage of register-based programming is that programming at a manufacturer-specific binary level often causes the programs to be more complex than SCPI programs. Unlike specifying a relay module number, row, and column in an SCPI program, the register-based programs require the programmer to specify a register address, offset, and weighted bit (channel) value.
Benchmark Programs
The following programs measure throughput speed, which is defined here as the time required to send a command to the dense matrix relay module and for a relay to close. The programs, written as they might appear in an actual test system, compare typical throughput speeds obtained using SCPI and register-based programs with different controllers and programming languages. Table II summarizes the throughput speeds.
The highest throughput is achieved when SCPI command parsing is eliminated. This occurs when the relay module's FIFO memory is accessed directly via WRITEIO from the VXIbus backplane with an embedded controller or with IBASIC. Note that register-based programming using DIAG:POKE offers little if any throughput advantage over the high-level CLOSE command. This is because of the command module's fast command parser.
Benchmark 1
Configuration: Mg. 7.
Command: WRITEIO <select code>,<register number>,
<register data>
Language: HP BASIC/NVS 6.0
Program:
10 CONTROL 16,25;2 !Map the V/360 A16 addr. space for WRITEIO 20 Base-addr=DVAL("DOOO",16) !Convert base address to a REAL 30 !number 40 Reg_addr=Base_addr+32 !Add register offset, store register 50 !address 60 INTEGER I 70 T1=TIMEDATE !Time WRITEIO 80 FOR 1=1 TO 100 90 WRITEIO 16,Reg_addr;1 !Connect row 0 to column 0 on bank 0 100 REPEAT 110 UNTIL BIT(READIO(-16,Base_addr+4),7) !Monitor relay card status 120 !register bit 7 (busy bit) to determine when relay is closed 130 NEXT 1 140 T2=TIMEDATE 150 PRINT "V/360 WRITEIO): ;((T2-T1)/100.)*1.E+3;"ms" 160 Compute time 170 END Result: V/360 (WRITEIO): 7.2998046875 ms Benchmark 2 Configuration: Mg. 8. Command: DIAGnostic:POKE <address>,<width>,<data> Language: HP BASIC/WS 6.0. Program: 10 INTEGER I !Declare Ioop counter variable 20 ASSIGN @Comm TO 70900 !Assign I/O path 30 T1=TIMEDATE !Time DIAG:POKE 40 FOR 1=1 TO 10 50 OUTPUT @Comm;"DIAG:POKE H1FDO20,16,1" !Connect row 0 to 60 column 0 on bank 0 status bit 7 (busy). 70 REPEAT 80 OUTPUT @Comm;"DIAG:PEEK? H1FDO04,16" !Monitor relay card 90 !to determine when the relay is closed 100 ENTER @Comm;Status 110 UNTIL BIT(Status,7) 120 NEXT I 130 T2=TIMEDATE 140 PRINT "V/360 (DIAG:POKE): ;((T2-T1)/10.)*1.E+3;"ms" !Compute time 150 END Result: V/360 (DIAG:POKE): 14.9993896484 ms Benchmark 3 Configuration: Fig. 8. Command: [ROUT:ICLOS @channel-list) Language: HP BASIC/WS 6.0. Program: 10 INTEGER I !Declare loop counter variable 20 ASSIGN @Switch TO 70908 !Assign I/O path 30 T1=TIMEDATE Time CLOS 40 FOR 1=1 TO 10 50 OUTPUT @Switch;"CLOS (@10000);*OPC?" !Connect row 0 to 60 !column 0 on bank 0 and Wait for relay to close (*OPC?) 70 ENTER @Switch;A 80 OUTPUT @Switch;"OPEN (@10000);'OPC?" Wait for relay to open 90 ENTER @Switch;A 100 NEXT I 110 T2=T1 M E DATE 120 PRINT "V/360(CLOS COMMAND):";((T2-T1)/20.)'I.E+3;"ms" !Compute 130 !Time 140 END Result: V/360 (CLOS COMMAND): 13.4994506836 ms Benchmark 4 Configuration: Mg. 9. Command: DIAG: POKE <address>,<width>,<data> Language: HP BASIC/NVS 6.0. Program: The same as benchmark 2 except for line 140. 140 PRINT "217/B6 (DIAG:POKE): ;((T2-T1)/10.)*1.E+3;"ms" Result: 217/B6 DIAG:POKE): 19.9981689453 ms Benchmark 5 Configuration: Fig. 9. Command: [ROUT]CLOS (@channel_list) Language: HP BASICIWS 6.0 Program: The same as benchmark 3 except for line 130. 130 PRINT "217/B6 SCPI (CLOS COMMAND): ;((T2-T1)/20.)*1.E+3;"ms" Result: 217/B6 SCPI (CLOS COMMAND): 15.0009155273 ms Benchmark 6 Configuration: Fig. 9. Command: DIAGnostic:POKE <address>,<width>,<data> Language: HP BASIC/WS 6.0 Program: Same as benchmark 2 except for line 130. 140 PRINT 370/WS DIAG:POKE): ;((T2-T1)/10.)*1.E+3;"ms" Result: 370/WS DIAG:POKE): 14.9993896484 ms Benchmark 7 Configuration: Fig. 9. Command: [ROUT:]CLOS @channel_list) Language: HP BASICIWS 6.0. Pro : The same as benchmark 3 except for line 120. 120 PRINT 370[WS SCPI (CLOS COMMAND): ;((T2-T1)/20.)*1.E+3;"ms" Result: 370/WS SCPI (CLOS COMMAND): 13.0004882813 ms Benchmark 8 Configuration: Fig. 10. Command: WRITEIO <select code>,<register number>,<register data> Language: HP IBASIC Program: 10 INTEGERI Declare loop counter variable 20 Base-addr=DVAL("IFDOOO",16) !Convert base address to a REAL 30 !number 40 Reg-addr=Base-addr+32 !Add register offset, store register address 50 TL=TIMEDATE Time WRITE[O 60 FOR 1=1 TO 100 70 WRITEIO 9826,Reg_addr;1 !Connect row 0 to column 0 on bank 0 80 REPEAT 90 UNTIL BIT(READIO(-9826,Base_addr+4),7) !Monitor relay card status 100 !register bit 7 (busy) to determine when the relay is closed 110 NEXT 1 120 T2=TIMEDATE 130 PRINT "IBASIC(WRITEIO): ;((T2-T1)/100.)Il.E+3;"ms" !Compute time 140 END Result: IBASIC (WRITEIO): 8.49975585938 ms Benchmark 9. Configuration: I%g. 10. Command: DIAG:POKE <address>,<width>,<data> Language: HP IBASIC. Program: Same as benchmark 2 except for lines 20 and 140. 20 ASSIGN @Comm TO 80900. !Assign I/O path 140 PRINT "IBASIC DIAG:POKE): ;((T2-T1)/100.)'1000.;"ms" Result: IBASIC DIAG:POKE): 23.0009765625 ms Benchmark 10 Configuration: I%g. 10. Command: [ROUT:]CLOS @channel_list) Language: HP IBASIC. Program: Same as benchmark 3 except for lines 20 and 120. 20 ASSIGN @Switch TO 80908. !Assign I/O path 120 PRINT "IBASIC (CLOS COMMAND): ;((T2-T1)/20.)11000.;"ms" Result: IBASIC (CLOS COMMAND): 16.4993286133 ms Benchmark 11 Configuration: Fig. 11 Command: DIAGN:POKE <address>,<width>,<data> Language: Borland Turbo C++ Version 1.0. Program: ' Include the following header files #include <stdio.h> #include <string.h> #include <time.h> #include <chpib.h> /* File is in HP-IB command library */ #include <cfunc.h> /* File is in HP-IB command library */ ' Defines the command module HP-IB address #define ADDR 70900L 1 Defines the relay modules register address / #define DIAG-OUT "DIAG:POKE #H1FD020,16,1" #define DIAG_IN "DIAG:PEEK? HIFDO04,16" int main(void) { time_t T1, T2; int loop; float init_status, last status 0.; /* Set HP-IB timeout for error checking */ error_handler (IOTIMEOUT (7L,5.0), "TIMEOUT"); /* Get initial status bit value */ error_handler(IOOUTPUTS(ADDR, DIAG_IN, strlen(DIAG_IN)), "OUTPUT command"); error-handler(IOENTER(ADDR, &init_status), "ENTER command"); /* Determine initial time of test */ T1 = time(NULL); /* Start loop to determine time */ for (loop = 1; loop <= 1000; loop ++) { /* Close relay for each loop */ error_handler(IOOUTPUTS(ADDR, DIAG_OUT, strlen(DIAG_OUT)), "OUTPUT command"); Determine if relay is closed before executing next loop'/ while((init_status - last_status) != 128) Read status value error-handler(IOOUTPUTS(ADDR, DIAG_IN, strlen(DIAG_IN)), "OUTPUT command"); error-handler(IOENTER(ADDR, &last_status), "ENTER command"); Reset the status value for next loop last_status = 0.; Determine time at end of test T2 = time(NULL); /* Calculate and display test time printf("Time = %f seconds", (difftime(T2,T1) 1000)); return 0; int error-handler (int error, char *routine) char ch; if (error != NOERR) printf "\n Error %d %s \n", error, errstr(error)); printf (" in call to HP-IB function %s \n\n", routine); printf ("Press Enter' to exit: scanf "%c", &ch); exit(0); return 0; Result: Time = 0.010000 seconds Benchmark 12 Configuration: Fig. 11. Command: [ROUT:]CLOS (@channel-list) Language: Borland Turbo C++ Version I.O. Program: 1 Include the following header files #include <stdio.h> #include <time.h> #include <chpib.h> /* Defines the relay module HP-IB address */ #define ADDR 70908L /* Defines the relay open command */ #define SCPI-CLOSE "CLOS (@10000);*OPC? -#define SCPI-OPEN "OPEN (@10000);*OPC?" int main(void) time_t T1, T2; int loop, length = 5; char into[61; /* Set HP-IB timeout for error checking error-handler (IOTIMEOUT (7L,5.0), "TIMEOUT"); /* Determine initial time of test T1 = time(NULL); /* Start loop to determine time */ for (loop = 1; loop <= 500; loop ++) error_handler(IOOUTPUTS(ADDR, SCPI_CLOSE, strlen(SCPI_CLOSE)), "OUTPUT command"); error_handler(IOENTERS(ADDR, into, Iength), 'ENTER command'); error_handler(IOOUTPUTS(ADDR, SCPI_OPEN, strlen(SCPI_OPEN)), "OUTPUT command"); error_handler(IOENTERS(ADDR, into, &length), "ENTER command"); /* Determine time at end of test */ T2 = time(NULL); /* Calculate and display test time */ printf("Time = %f seconds", difftime(T2,T1) / 1000)); return 0; } Error checking routine int error-handler (int error, char *routine) char ch; if (error! = NOERR) printf "\n Error %d %s \n", error, errstr(error)); printf (" in call to HP-IB function %s \n\n", routine); printf ("Press Enter' to exit scanf ("%c', &ch); exit(O); return 0; Result: Time = 0.013000 seconds Benchmark 13 Configuration: rag. 12. 9 Command: Direct register access. Language:C. Program: #include <time.h> #include "sys/vxi.h" #include <f cntl.h> #include <stdio.h> #define LA 64 #define looptimes 5.0 main() f int stat; int fd; int i; int j; struct dev_regs unsigned short id-reg; unsigned short device_type; unsigned short status_reg; unsigned short dummy[131; unsigned short banko_channels; dev; struct timeval first, second, lapsed; struct timezone tzp; /* open the device file */ fd=open("/dev/vxi/primary",O_RDWR); if fd<0) { perror("open'); exit(1); } dev=(struct dev_regs *)vxi_get_al6_addr(fd,LA); /* create 7-ms busy time */ gettimeofday &first,&tzp); for (j=0; j<=7000; j ++); gettimeofday (&second,&tzp); if first.tv_usec >second.tv_usec) second.tv_usec += 1000000; second.tv_sec--; I lapsed.tv_usec = second.tv usec - first.tv_usec; lapsed.tv_sec = second.tv_sec - first.tv_sec; printf ("Channel closing (busy) time = %Id sec %Id usec \n",Iapsed.tv_sec,lapsed.tv_usec); gettimeofday(&first,&tzp); for (i=0; i<=Iooptimes; i ++) { Close channel 1, wait 7-ms (busy time) dev->bank0_channels=0x0001; for j=0; i<=7000; i +); dev->bank0-channels=0x0000; for i=0; i<=7000; j ++); } gettimeofday (&second,&tzp); if (first.tv_usec > second.tv_usec) { second.tv_usec = 1000000; second.tv_sec--; } lapsed.tv_usec = (second.tv_usec - first.tv_usec)/10.; lapsed.tv_sec = (second.tv_sec - first.tv_sec)/10.; printf("Command execution and busy time = %Id sec %Id usec \n",lapsed.tv_sec,lapsed.tv_usec); /* rtprio(O,RTPRIO_RTOFF); */ } Results: Channel closing (busy) time = 0 sec 7322 usec Command execution and busy time = 0 sec 8718 usec
Conclusion
The dense matrix relay modules are among the highest-density VXIbus switch modules available today. FIFO memory on the relay modules enhances system throughput by allowing the modules to interrupt their commander's CPU only after the last relay in their channel list is closed.
The relay modules can be programmed using ASCII-based SCPI commands and the HP E1405 command module, or can be programmed directly at the register level. Benchmark programs show that the highest throughput is achieved with register-based programs in which SCPI command parsing is eliminated, and the registers are accessed from the VXIbus backplane. Subtracting the 7-ms relay settling time from each benchmark shows that access from the VXIbus backplane is up to 26 times faster than the HP-IB. However, it is the command parsing time, rather than HP-IB or VXIbus speeds, that has the greatest impact on throughput. Benchmarks using DIAG:POKE were run because of its similarity to commands supported by other command parsers. The results show that DIAG:POKE, an SCPI command that writes data directly to the relay module's FIFO memory, offered approximately the same throughput performance as the high-level CLOSE command. This is attributed to the efficient SCPI parsing algorithms of the HP E1405 command module and shows that with a fast command parser, there is little throughput advantage to register-based programming unless command parsing is eliminated entirely.
Acknowledgments
We would like to thank Ron Hanson, Chuck Platz, and Conrad Proft for the useful technical discussions. A special thanks goes to Peter Meyer for his C programs for the HP Vectra computer, and to Art Boyne and Frank Goss for their reviews.
Bibliography
1. VMEbus Extensions for Instrumentation System Specification, Revision 1.3, July 1989.
2. Standard Commands for Programmable Instruments Manual, Version 1990.0, April 1990.
3. HP E1326B/E1411B 5 112-Digit Multimeter User's Manual, Edition 1, HP Part Number E1326-90003.
4. L. DesJardin, "VXIbus versus GPIB: Is VXIbus actually faster?," VXIbus Journal, November 1990, pp. 11-14.
COPYRIGHT 1992 Hewlett Packard Company
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