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  • 标题:Sequential Circuits In The Framework Of (2n+1)-ary Discrete Logic
  • 本地全文:下载
  • 作者:D. Venkat Reddy ; Ch. D. V. Paradesi Rao ; E. G. Rajan
  • 期刊名称:International Journal of Computer Science and Network Security
  • 印刷版ISSN:1738-7906
  • 出版年度:2008
  • 卷号:8
  • 期号:7
  • 页码:175-181
  • 出版社:International Journal of Computer Science and Network Security
  • 摘要:This paper is concerned with the formulation of a novel paradigm called (2n+1)-ary logics and their ultimate use in the development of multiple valued logic based processor. Apart from a preliminary introduction to the binary valued logic systems, this paper introduces the notion of Truth values Reliability-Unreliability model and a brief exposition of multiple valued logic in the framework of switching algebra. Finally the paper discusses the simulation results of implementing primarily ternary and penta logic switching functions using traditional binary logic circuits.
  • 关键词:Multiple Valued Logic, Switching functions
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