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  • 标题:500 Million Transistor Integrated Circuit Delay Analysis : Parameter Optimization using Taguchi Approach
  • 本地全文:下载
  • 作者:Evln Ranga
  • 期刊名称:Computer Sciences and Telecommunications
  • 印刷版ISSN:1512-1232
  • 出版年度:2008
  • 卷号:16
  • 期号:02
  • 出版社:Internet Academy
  • 摘要:

    Delay analysis of 500 million transistor integrated circuit is optimized using
    test plan L8, in the form of an orthogonal array and a software for automatic
    design and analysis of experiments both based on Taguchi approach. Optimal levels
    of physical parameters and key components namely number of metal layers,
    minimum feature size, resistivity, threshold voltage, effective length, saturation drain
    current and supply voltage play an important role in the estimation of integrated
    circuit frequency. The chip frequency under these optimal conditions was
    2472.85MHz.

  • 关键词:Delay analysis; Optimization; Taguchi method; Chip Frequency²ñÊ}Í6
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