Delay analysis of 500 million transistor integrated circuit is optimized using
test plan L8, in the form of an orthogonal array and a software for automatic
design and analysis of experiments both based on Taguchi approach. Optimal levels
of physical parameters and key components namely number of metal layers,
minimum feature size, resistivity, threshold voltage, effective length, saturation drain
current and supply voltage play an important role in the estimation of integrated
circuit frequency. The chip frequency under these optimal conditions was
2472.85MHz.