Vector Quantization (VQ) is successfully applied to data compression. In image compression, Multiple-VQ with Index Inference (MVQII) can provide a much better restored image quality than conventional VQ methods. However, the index inference increases the computational complexity of the decoding process in proportion to the number of weights. In this paper, in order to accelerate the decoding process of MVQII, we present three types of digital circuit design for the decoder. The presented designs are implemented on FPGAs and are evaluated in terms of operating speed, processing time. The results show that two versions achieve good improvement in processing speed at reasonable expenses of circuit size and that the fastest version is nearly ten times faster than a software implementation on a modern standard computer.

Vector quantization, decoder, multiple vector quantization, digital circuit, FPGAs