This paper deals with simulation of STATCOM used for harmonic reduction with the aid of multilevel VSI circuit. The harmonics in STATCOM due to the voltage ripple are reduced. As a result, the size of inductor and DC capacitor can be reduced. The STATCOM has the great advantage of a fewer number of devices. The VSI is extremely fast in response to reactive power change. The simulation of the STATCOM is performed in the Simulink environment and the results are presented.