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  • 标题:Testing Virtual Reconfigurable Circuit Designed For A Fault Tolerant System
  • 本地全文:下载
  • 作者:Kumar, P. Nirmal ; Anandhi, S. ; Elancheralathan, M.
  • 期刊名称:Journal of Computer Science
  • 印刷版ISSN:1549-3636
  • 出版年度:2007
  • 卷号:3
  • 期号:12
  • 页码:934-938
  • DOI:10.3844/jcssp.2007.934.938
  • 出版社:Science Publications
  • 摘要:This research describes about the testing of virtual reconfigurable circuit (VRC) designed and implemented for a fault tolerant system which averages the (three) sensor inputs. The circuits that are to be tested are those which are successfully evolved in this system under different situations such as (i) all the three sensors are faultless (ii) one of the input sensor fails as open (iii) sensors fails as short circuit. The objective of this research is to test the desired optimal circuits evolved by decoding the configuration bit streams. The logic simulation tool used to perform fault simulation is AUSIM (Auburn University Simulator).
  • 关键词:FPGA; Virtual Reconfigurable Circuit (VRC); fault tolerant system; sensor failure; AUSIM; ASL
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