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  • 标题:Teaching Reed-Muller techniques in introductory classes on logic design
  • 本地全文:下载
  • 作者:Yanushkevich Svetlana N. ; Shmerko Vladimir P.
  • 期刊名称:Facta universitatis - series: Electronics and Energetics
  • 印刷版ISSN:0353-3670
  • 电子版ISSN:2217-5997
  • 出版年度:2007
  • 卷号:20
  • 期号:3
  • 页码:331-365
  • DOI:10.2298/FUEE0703331Y
  • 出版社:University of Niš
  • 摘要:

    Reed-Muller techniques are not traditionally included in the textbooks for introductory one-semester courses on logic design. Two exclusions are the textbooks by D. Green (1986) and T. Sasao (1999). Based on our experience of developing and instructing logic design courses, we introduce our approach to teaching the Reed- Muller techniques for undergraduate students.

  • 关键词:Reed-Miller techniques; logic design; sum-of-product; Boolean techniques; minterms; polynomial form
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