期刊名称：International Journal of Reconfigurable Computing
印刷版ISSN：1687-7195
电子版ISSN：1687-7209
出版年度：2012
卷号：2012
DOI：10.1155/2012/439727
出版社：Hindawi Publishing Corporation
摘要：This work describes a methodology to model power
consumption of logic modules. A detailed mathematical model
is presented and incorporated in a tool for translation of
models written in VHDL to SystemC. The functionality for
implicit power monitoring and estimation is inserted at module
translation. The translation further implements an approach to
wrap RTL to TLM interfaces so that the translated module can
be connected to a system-level simulator. The power analysis is
based on a statistical model of the underlying HW structure
and an analysis of input data. The flexibility of the C
