期刊名称：International Journal of Reconfigurable Computing
印刷版ISSN：1687-7195
电子版ISSN：1687-7209
出版年度：2010
卷号：2010
DOI：10.1155/2010/953693
出版社：Hindawi Publishing Corporation
摘要：Future chip technologies will change the way
we deal with hardware design. First of all, logic resources
will be available in vast amount. Furthermore, engineering
specialized designs for particular applications will no longer be
the general approach as the nonrecurring expenses will grow
tremendously. Reconfigurable logic has often been promoted
as a solution to these problems. Today, it can be found in
two varieties: field programmable gate arrays or coarse-grained reconfigurable arrays. Using this type of technology typically
requires a lot of expert knowledge, which is not sufficiently
available. Thus, we believe that online synthesis that takes place
during the execution of an application is one way to broaden
the applicability of reconfigurable architectures. In this paper, we show that even a relative simplistic synthesis approach with
low computational complexity can have a strong impact on the
performance of compute intensive applications.
