期刊名称：International Journal of Reconfigurable Computing
印刷版ISSN：1687-7195
电子版ISSN：1687-7209
出版年度：2012
卷号：2012
DOI：10.1155/2012/850487
出版社：Hindawi Publishing Corporation
摘要：An FPGA-based Linux test-bed was constructed for
the purpose of measuring its sensitivity to single-event upsets.
The test-bed consists of two ML410 Xilinx development boards
connected using a 124-pin custom connector board. The Design
Under Test (DUT) consists of the “hard core” PowerPC, running
the Linux OS and several peripherals implemented in “soft”
(programmable) logic. Faults were injected via the Internal
Configuration Access Port (ICAP). The experiments performed
here demonstrate that the Linux-based system was sensitive to
199,584 or about 1.4 percent of all tested bits. Each sensitive bit
in the bit-stream is mapped to the resource and user-module to
which it configures. A density metric for comparing the reliability
of modules within the system is presented. Using this density
metric, we found that the most sensitive user module in the design
was the PowerPC's direct connections to the DDR2 memory
controller.
