期刊名称：International Journal of Soft Computing & Engineering
电子版ISSN：2231-2307
出版年度：2012
卷号：1
期号：6
页码：162-167
出版社：International Journal of Soft Computing & Engineering
摘要：Delay and power are two major issues in design and synthesis of VLSI circuits which depends on different design parameters. In this paper, the relative study of propagation delay and power consumption of UDSM CMOS inverter is found considering the channel length below 100nm. The simulation results are taken for different technology (32nm, 45nm, 65nm and 90nm) with the help of Tanner (T-spice) simulation tool. The values of model parameters are used from current Berkeley Predictive Technology Model (PTM). Also the results are analyzed by varying load capacitance, supply voltage & transistor widths.
