期刊名称：International Journal of Soft Computing & Engineering
电子版ISSN：2231-2307
出版年度：2012
卷号：2
期号：2
页码：257-261
出版社：International Journal of Soft Computing & Engineering
摘要：This paper analysis the low power and high performance models of PTM with Hi-K metal gate cmos technology by using them in an cmos inverter at 22nm technology node.The characteristics are compared with cmos bulk technology as well. This analysis gives an insight into leakages when the input voltage is sweeping from minimum to maximum voltage.The aim of HiK metal gate technology is to reduce the leakage at sub 32nm node and is a good alternative to cmos bulk technology having high leakage and power dissipation as seen in this paper’s comparative analysis. All the simulation is done with hspice simulator at 22nm technology node with PTM models of Arizona state university.
关键词：22nm cmos; body biasing;Scaling issues;ptm;models
