期刊名称：International Journal of Soft Computing & Engineering
电子版ISSN：2231-2307
出版年度：2012
卷号：2
期号：2
页码：437-441
出版社：International Journal of Soft Computing & Engineering
摘要：In the earlier era of electronics the UART (Universal asynchronous receiver/transmitter) played a major role in data transmission. This UART IP CORE provides serial communication capabilities,which allow communication with modems or other external devices. Thiscore is designed to be maximally compatible with industry standard designs[4]. Thekey features of this design are WISHBONE INTERFACE WITH 8- BIT OR 32-BIT selectable data bus modes. Debug interface in 32-bit data bus mode. Registerlevel and functionalcompatibility. FIFO operation. The design is verified using VMM based on system verilog. The test bench is written with regression test cases in order to acquire maximum functional coverage.
