期刊名称：International Journal of Soft Computing & Engineering
电子版ISSN：2231-2307
出版年度：2012
卷号：2
期号：4
页码：284-286
出版社：International Journal of Soft Computing & Engineering
摘要：We present a CMOS compatible n-type gate-all-around (GAA) silicon nanowire (NW) MOSFETs with excellent electrostatic scaling. This paper investigates the sensitivity of gate-all-around (GAA) nanowire (NW) to process variations in silicon film thickness and material i.e. Si and Ge with multigate devices using analytical solutions of Poisson's equation verified with device simulation Our study indicates that the GAA nanowire (NW) has the smallest threshold voltage (Vth) dispersion caused by process variations in silicon film thickness. Specifically, the GAA NW shows better immunity to channel thickness variation than multigate devices because of its inherently superior surrounding gate structure. To explore the optimum design space for (GAA) silicon nanowire (NW) MOSFETs were performed with three variable device parameters: channel width, material, and silicon film thickness. The efficiency of the GAA gate structures is shown to be dependent of these parameters.
