期刊名称：International Journal of Soft Computing & Engineering
电子版ISSN：2231-2307
出版年度：2013
卷号：3
期号：1
页码：177-181
出版社：International Journal of Soft Computing & Engineering
摘要：In this paper, we propose Kogge-Stone and Brent- Kung parallel prefix adders based on degenerate pass transistor logic (PTL). Threshold loss problem are the main drawback in most pass transistor logic family. This threshold loss problem can be minimized by using the complementary control signals. These complementary control signals are obtained by 5-Transistor XOR-XNOR module. By using these complementary outputs we designed parallel prefix adders based on 10-Transistor full adder. Parallel prefix adders are used to speed up the binary addition and these adders are more flexible to perform addition of higher order bits in complex circuits. The transistor level implementation of parallel prefix adders based on degenerate PTL gives better performance compared to CPL and DPL pass transistor logic.
