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  • 标题:Modelling and Simulation of 128-Bit Crossbar Switch for Network On Chip
  • 本地全文:下载
  • 作者:Mohammad Ayoub Khan ; Abdul Quaiyum Ansari
  • 期刊名称:International Journal of VLSI Design & Communication Systems
  • 印刷版ISSN:0976-1527
  • 电子版ISSN:0976-1357
  • 出版年度:2011
  • 卷号:2
  • 期号:3
  • 出版社:Academy & Industry Research Collaboration Center (AIRCC)
  • 摘要:This is widely accepted that Network-on-Chip represents a promising solution for forthcoming complex embedded systems. The current SoC Solutions are built from heterogeneous hardware and Software components integrated around a complex communication infrastructure. The crossbar is a vital component of in any NoC router. In this work, we have designed a crossbar interconnect for serial bit data transfer and 128-parallel bit data transfer. We have shown comparision between power and delay for the serial bit and parallel bit data transfer through crossbar switch. The design is implemented in 0.180 micron TSMC technology.The bit rate achived in serial transfer is slow as compared with parallel data transfer. The simulation resuls show that the critical path delay is less for parallel bit data transfer but power dissipation is high.
  • 关键词:Network-on-Chip; routing; SoC; Crossbar
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