期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2012
卷号：3
期号：4
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：Power dissipation is an important design constraint in today’s CMOS VLSI design and is addressed widely by the researchers across the globe. Switching activity is one of the factors that affect dynamic power in a chip and several publications have suggested various techniques to reduce the same. Reduction of switching activity in the busses attains significance as bus width, bus capacitance and the clock are recording continuous uptrend. In this paper, we propose a technique for bus encoding, which, reduces the number of transitions on the bus and performs better than the existing methods such as bus invert coding and shift invert coding for random data in terms of switching activity, without the need for extra overhead in computation and circuit. However, irrespective of the bus width it needs three extra bits and does not assume anything about the nature of the data on the bus.
关键词：Bus encoding; Switching activity; CMOS VLSI; Power dissipation; Low Power Design.
