期刊名称：International Journal of Computer Science and Information Technologies
电子版ISSN：0975-9646
出版年度：2012
卷号：3
期号：2
页码：3530-3535
出版社：TechScience Publications
摘要：Memory based structures are well-suited for many digital signal processing (DSP) applications, which involve multiplication with a fixed set of coefficients. Memory-based structures are more regular compared with the multiplyaccumulate Structures and have many other advantages of less area and reduced latency implementation since the memoryaccess- time is much shorter than the usual multiplication-time compared to the conventional multipliers. Distributed arithmetic (DA)-based computation is popular for its potential for efficient memory-based implementation of finite impulse response (FIR) filter. In this paper, however, we show that the look-up-table (LUT)-multiplier-based approach, where the memory elements store all the possible values of products of the filter coefficients could be an area-efficient alternative to DA-based design of FIR filter with the same throughput of implementation. By operand and inner-product decompositions, respectively, we have designed the conventional LUT-multiplier-based and DA-based structures for FIR filter of equivalent throughput, where the LUT-multiplier-based design involves nearly the same memory and the same number of adders, and less number of input register at the cost of slightly higher adder-widths than the other. Moreover, we present new approach to LUT-based multiplication, which could be used to reduce the memory size to half of the conventional LUT-based multiplication. Besides, we present a modified transposed form FIR filter, where a single segmented memory-core with only one pair of decoders are used to minimize the combinational area. We have implemented the FIR filter using proposed LUT-multiplier and LUT-multiplier based transposed form FIR filter both of order four using Xilinx tool in VHDL.
