期刊名称：Indian Journal of Computer Science and Engineering
印刷版ISSN：2231-3850
电子版ISSN：0976-5166
出版年度：2011
卷号：2
期号：1
页码：43-47
出版社：Engg Journals Publications
摘要：Signed integers are normally represented using 2�s complement representation. Addition and subtraction of signed numbers is done in the same manner as for unsigned numbers. However carry (or borrow) is simple ignored. Unlike unsigned number carry (or borrow) does not mean overflow or error. Doubling of a signed number can be done by shift left. However, halving of a signed number can not be done by shift right. Hence special arithmetic instruction SAR (Shift arithmetic right) is needed. We have defined an alternative representation for signed numbers. Here a positive number is represented by appended a zero (0) at right. Here a negative number is represented by inverting all bits in corresponding positive number. Two signed numbers are added by adding corresponding binary representation. After that carry is added to the result. Similarly two signed numbers are subtracted by subtracting corresponding binary representation. After that borrow is subtracted. Doubling and halving is done by ROL (Rotate left) and ROR (Rotate right) respectively. Following are drawbacks of our system. (A) Addition is done in two stages. In the first stage the numbers are added. In the second stage carry is added. Carry can not be ignored as in 2�s complement representation. (B) Same holds for subtraction. (C) When an odd number is halved then error results. In 2�s complement representation approximate answer appears. The advantage of our system is that entire arithmetic can be carried using ordinary logical instructions. No special instruction is needed. In 2�s complement representation a special instruction SAR is needed. This instruction is not used for any other purpose.
