期刊名称：International Journal of Electronics and Computer Science Engineering
电子版ISSN：2277-1956
出版年度：2013
卷号：2
期号：1
页码：94-101
出版社：Buldanshahr : IJECSE
摘要：The All-Digital Phase-Locked Loop (ADPLL) is digital electronic circuit that are used in modern electronic communication systems like frequency synthesizer, modulator/demodulator etc. This paper presents a review of various ADPLL techniques. The range of input frequency of ADPLL is 40 to 98 MHz; the output frequency may be up to 2.92 to 4 GHz range. The components of ADPLL such as phase detector, loop filter, Voltage Controlled Oscillator have been discussed in detail. Various problems in Digital PLL like noise, leakage, parasitic element etc. can be removed with the help of All-Digital PLL. Various parameters of ADPLL like power consumption, jitter, input and output frequency have also been compared. Now a days, processors using ADPLL having frequency in GHz range are being used in mobile communication to increase the speed of the system.
关键词：Phase-Locked Loop (PLL); Phase detector (PD); Loop filter; Voltage Controlled Oscillator (VCO); Time to;digital converter (TDC); Digital PLL (DPLL); All Digital PLL (ADPLL).
