期刊名称：International Journal of Advanced Research In Computer Science and Software Engineering
印刷版ISSN：2277-6451
电子版ISSN：2277-128X
出版年度：2013
卷号：3
期号：4
出版社：S.S. Mishra
摘要：This research is concerned with incorporating the algorithms that are used inside the VLSI layout design. Area, Speed, Power dissipation, Design time and Testability are the important entities to be optimized when a VLSI circuit is designed [8]. But the complexity is simply too high. The two concepts Hierarchy and Abstraction are helpful to deal with the complexity. Hierarchy shows the structure of the design and the Abstraction hides the lower level details. This research mainly focuses the area of the Physical (or Layout) domain. VLSI layout designs are typically represented as graphs. Generally vertex orderings is induced by the traversals such as depth-first search or breadth-first search. The performance of one traversal algorithm may be better than the performance of any other traversal algorithms for a particular vertex of a graph or a general tree. So it is necessary to determine a best suitable algorithm to find a goal vertex instead of using any one of them randomly. This research will give a solution for this problem. The standard algorithms, Breadth First Search (BFS) and Depth First Search (DFS) are used in this research. So the best suitable algorithm for a particular vertex will be chosen from these two algorithms without traversing.
