期刊名称：International Journal of Advanced Research In Computer Science and Software Engineering
印刷版ISSN：2277-6451
电子版ISSN：2277-128X
出版年度：2012
卷号：2
期号：2
出版社：S.S. Mishra
摘要：Digital Signal Processing domain has long been dominated by software systems; however, the state of art signal processing is now again switching back to hardware based solutions. This requires development of algorithms that can be efficiently implemented on different hardware platforms. CORDIC is one such hardware-efficient algorithm that is used in DSP systems for calculating trigonometric, hyperbolic, logarithmic and other transcendental functions. This paper attempts to explore the different implementations of CORDIC architectures, specific to FPGA devices. The algorithm is implemented in two different styles: folded and unfolded. Unfolded design is improved architecturally by pipelining it. Comparisons are then made between these architectures based on area, speed, throughput and power parameters and logical conclusions are drawn. All three designs have been coded in VHDL and implemented using Xilinx FPGA synthesis tool. To check the functionality of the algorithm each of the designs has be en simulated for sine and cosine function evaluations. The simulations are carried out using Xilinx ISim tool and power metrics are obtained using Xilinx Xpower Analyzer tool.
