期刊名称：International Journal of Advanced Research In Computer Science and Software Engineering
印刷版ISSN：2277-6451
电子版ISSN：2277-128X
出版年度：2012
卷号：2
期号：10
出版社：S.S. Mishra
摘要：Continuous scaling of the transistor size and reduction of the operating voltage has led to a significant performance improvement of integrated circuits. Low power consumption and smaller area are some of the most important criteria for the fabrication of DSP systems and high performance systems. In this paper there is try to determine the best solution to this problem by comparing a few adders. In this project w hen we compare the power consumption of all the adders we find that carry look ahead and Carry bypass adder consume more power. The conventional full adder is built by 28 transistors. So, the transistor count is very high. The average power consumption and delay is very high. In this paper a new circuit which is made by mainly the TG technology. For the purpose of comparative analysis of TG based 8 -bit different adder Design using 180nm technology, we use TANNER tool.
