期刊名称：International Journal of Electronics and Computer Science Engineering
电子版ISSN：2277-1956
出版年度：2012
卷号：1
期号：3
页码：1134-1139
出版社：Buldanshahr : IJECSE
摘要：in this paper, we present a VLSI architecture for the separable two-dimensional Discrete Wavelet Transform (DWT) decomposition. Using a recursive property, we showed how the proposed separable architecture uses only a minimal number of filters to generate all level of DWT computation. For the computation of an N x N 2-D DWT with a filter length L, the architecture requires 2(L-1) adders, 2L multipliers, (2L+1) multiplexers and a RAM of size (N/2 x N/2). The hardware utilization of architecture is 100%
