期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2013
卷号：4
期号：5
DOI：10.5121/vlsic.2013.4503
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：Today, all the portable device's in electronics needs to be realized with low power architectures because of power consumption is a main consideration along with other performance parameters. Low power consumption helps to reduce heat dissipation, increases battery life and also reliability. In this paper a 16-bit Reduced Instruction set Architecture (RISA) presented. This architecture can handle multiple interrupts and performing serial communication effectively. It can supported RISC (Reduced Instruction Set Computer) concepts. A popular technique of Clock gating is applied to the proposed architecture and then reduces the power. This entire architecture captured using VerilogHDL and implemented on FPGA using Xilinx tools
