期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2013
卷号：4
期号：5
DOI：10.5121/vlsic.2013.4509
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：This paper proposes a 2.4 GHz RF CMOS Power amplifier and variation in its main performance parameters i.e, output power, S-parameters and power added efficiency with respect to change in supply voltage and size of the power stage transistor. The supply voltage was varied form 1 V to 5 V and the range of output power at 1dB compression point was found to be from 10.684 dBm to 25.08 dBm respectively. The range of PAE is 16.65 % to 48.46 %. The width of the power stage transistor was varied from 150 μ m to 500 μ m to achieve output power of range 15.47 dBm to 20.338 dBm. The range of PAE obtained here is 29.085 % to 45.439 %. The total dimension of the layout comes out to be 0.714 * 0.508 mm2.
