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文章基本信息

  • 标题:High-Speed Data Rate Controller Using Verilog
  • 本地全文:下载
  • 作者:K. Harikishore ; B.K.V.Prasad ; G.V. Ravi Kumar
  • 期刊名称:International Journal of Computer Technology and Applications
  • 电子版ISSN:2229-6093
  • 出版年度:2011
  • 卷号:2
  • 期号:5
  • 页码:1517-1522
  • 出版社:Technopark Publications
  • 摘要:

    DDR SDRAM (Double Data Rate Synchronously Dynamic RAM) controller is discussed in this paper. The principle and commands of FPGA-based DDR SDRAM controller are detailed. The R/W control of DDR SDRAM is realized through Verilog HDL, and this controller is applied into 580MHz single channel high-speed, high-precision and large-capacity data acquisition board

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