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  • 标题:Implementation of Back Propagation Algorithm in Verilog
  • 本地全文:下载
  • 作者:Neelmani Chhedaiya ; Prof. Vishal Moyal
  • 期刊名称:International Journal of Computer Technology and Applications
  • 电子版ISSN:2229-6093
  • 出版年度:2012
  • 卷号:3
  • 期号:1
  • 页码:340-343
  • 出版社:Technopark Publications
  • 摘要:In this paper, a design method of neural networks based on Verilog HDL hardware description language, implementation is proposed. A design of a general neuron for topologies using back propagation algorithm is described. The sigmoid nonlinear activation function is also used. The neuron is then used in the design and implementation of a neural network using Xilinx Spartan-3e FPGA. The simulation results obtained with Xilinx ISE 9.2i software. The backpropagation algorithm is one of the most useful algorithms of ANN training. In this paper, we present the neuron impleme- ntation for the in topologies that are suitable for this algorithm. The neuron is then used in a multilayer neural network. For the implementation, Verilog HDL language is used. Verilog HDL is a hardware description language which simplifies the development of complex systems because it is possible to model and simulate a digital system form a high level of abstraction and with important facilities for modular design. The purpose of this work is to suggest and analyze several neuron implementations, show a way for the integration and control of the neurons within a neural network, and describe a way to implement a simple feedforward neural network trained by BP algorithm using Xilinx 9.2i
  • 关键词:Artificial Neural Network; Backpropagation; Verilog HDL.
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