期刊名称：International Journal of Computer Technology and Applications
电子版ISSN：2229-6093
出版年度：2012
卷号：3
期号：4
页码：1496-1500
出版社：Technopark Publications
摘要：The scaling down of technology in CMOS circuits, results in the down scaling of threshold voltage thereby increasing the sub-threshold leakage current. An IC consists of many circuits of which some circuits consists critical path like full adder, whereas some circuits like multiplexer and decoder has no specified critical path. LECTOR is a technique for designing leakage power reduced CMOS circuits without affecting the dynamic power dissipation, which can be used for circuits with no specified critical paths. MTCMOS, an efficient technique to achieve low power as well as high speed, is used for the circuits which have critical path. This paper presents the analysis for leakage current and propagation delay in CMOS circuits implementing LECTOR and MTCMOS techniques using nanoscale technologies
