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  • 标题:High Speed Hybrid Wallace Tree Multiplier
  • 本地全文:下载
  • 作者:Radhe Shyam Mishra ; Tauheed Khan ; Ashish Pratap Singh
  • 期刊名称:International Journal of Electronics and Computer Science Engineering
  • 电子版ISSN:2277-1956
  • 出版年度:2014
  • 卷号:3
  • 期号:1
  • 页码:69-75
  • 出版社:Buldanshahr : IJECSE
  • 摘要:The multiplication operation is an integral pa rt o f any digital system or digital computer, most notably in signal processing, graphics and scientific computation. It requires more hardware resources and processing time than addition and subtraction . In fact, 8.72% of all instructions in a typical processing unit i s multiplier .The speed of the system depends upon speed of the multiplier to a large extent. This necessitates the need of a high speed multiplier. With t h e advancement in technology, various techniques have been proposed to design multipliers, which offer high speed, low power consumption and lesser area. Thus making them suitable for various high speed, low power compact VLSI implementations. These three parameters i.e. power, area and speed are always traded off.
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