摘要:A digital background calibration
technique that corrects the capacitor mismatches error is proposed for
successive approximation register analog-to-digital converter (SAR ADC). The technique is implemented in SAR ADC
which is based on tri-level switching. The termination capacitor in the
Digital-to-Analog Converter (DAC) is regarded as a reference capacitor and the
digital weights of all other unit capacitors are corrected with respect to the
reference capacitor. To make a comparison between the size of the unit
capacitor and that of the reference capacitor, each input sample is quantized
twice. The unit capacitor being calibrated is swapped with the reference
capacitor during the second conversion. The difference between the two
conversion results is used to correct the digital weight of the unit capacitor
under calibration. The calibration technique with two reference capacitors is
presented to reduce the number of parameters to be estimated. Behavior simulation
is performed to verify the proposed calibration technique by using a 12-bit SAR
ADC with 3% random capacitor mismatch. The simulation results show that the
Signal-to-Noise and Distortion Ratio (SNDR) is improved from 57.2 dB to 72.2 dB and the Spurious Free Dynamic Range
(SFDR) is improved from 60.0 dB to 85.4 dB.
关键词:Analog-to-Digital Conversion; Capacitor Mismatch; Digital Background Calibration; SAR ADC