期刊名称：International Journal of Electronics and Computer Science Engineering
电子版ISSN：2277-1956
出版年度：2014
卷号：3
期号：4
页码：348-353
出版社：Buldanshahr : IJECSE
摘要：Finite Impulse Response (FIR) digital filters have potential for high-speed and low-power realization through parallel processing on FPGA. In this paper, an efficient implementation of FIR filters, which uses a Booth Radix-8 multiplier, is suggested. For implementation of the said FIR filter MATLAB FDATool is employed to determine various filter coefficients. The 8 order FIR filters have been designed using VHDL language. The proposed FIR filter is simulated and synthesized using Xilinx ISE 12.4i. FPGAs implementation results show that the proposed design filter has an improved speed in comparison to previous published results.
